Embodiments of the present invention relate to preconditioning of source data for a packed min/max instructions of a processor.
Known methods and apparatus can perform a minimum/maximum operation (a min/max operation), i.e., can compare a pair of source data and output either the source data that is the maximum of the pair of source data (a max operation) or the source data that is the minimum of the pair of source data (a min operation). FIG. 1 shows a known apparatus that can perform a known min/max operation on a pair of data, e.g., S2 and S1. An adder 101 and invertor 111 can subtract S1 from S2 when C1in is a logical one (e.g., adder 101 and invertor 111 perform twos-complement subtraction). The adder 101 outputs a carry, C1[15], that can indicate whether S2 is greater than S1. If S2 is less than S1, then C1[15] will be zero and multiplexer (mux) 106 will select S2 as the min output. If S1 is less than S2, then C1[15] will be one and mux 106 will select S1 as the min output.
A second set of logic circuits can be used to perform a max operation on S2 and S1, the second set of logic including adder 102, inverter 112, and mux 107. Adder 102 and invertor 112 can subtract S1 from S2 when C2in is a logical one (e.g., adder 102 and invertor 112 perform twos-complement subtraction). The adder 102 outputs a carry, C2[15], that can indicate whether S2 is greater than S1. If S2 is greater than S1, then C2[15] will be one and mux 107 will select S2 as the max output. If S1 is greater than S2, then C2[15] will be zero and mux 107 will select S1 as the max output.
One type of min/max operation is a Packed min/Packed max operation, which can be executed by a processor that executes SIMD (single instruction, multiple data) instructions. A SIMD instruction can include packed source data, e.g., eight bytes of source data, four words of source data, four signed words of source data, etc. A Packed min /Packed max (Pmin/Pmax) instruction can be executed by the processor to enhance video processing, audio processing, etc. Examples of uses of Pmin/Pmax operations include analyzing video pixel data (e.g., determining which pixel is darker, etc.) as part of morphing video images, overlaying video images, etc. Video pixel data can be encoded using signed word data (e.g., 16 bit data having a positive or negative value). Audio processing applications can also utilize Pmin/Pmax operations, such as analyzing audio data to determine differences in audio volumes. Audio data can be encoded using unsigned byte data (e.g., 8 bit data that is unsigned). Implementation of Pmin/Pmax operations in hardware can require additional hardware logic.
Known min/max operations can require two sets of logic circuits, including two adders. Additional logic can disadvantageously consume silicon area resources of a processor, an integrated circuit, etc. In view of the foregoing, it can be appreciated that a substantial need exists for methods and apparatus which can advantageously perform min/max operations.
Embodiments of the present invention include apparatus and methods to precondition source data for packed minimum/maximum operations. A first selector can be coupled to a first invertor and a first input, and a second selector can be coupled to a second invertor and a second input. An adder can be coupled to said first selector and said second selector. A third selector can be coupled to said adder, the first input, and the second input.